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| SN54/74LS170 4 x 4 REGISTER FILE OPEN-COLLECTOR The TTL / MSI SN54 / 74LS170 is a high-speed, low-power 4 x 4 Register File organized as four words by four bits. Separate read and write inputs, both address and enable, allow simultaneous read and write operation. Open-collector outputs make it possible to connect up to 128 outputs in a wired-AND configuration to increase the word capacity up to 512 words. Any number of these devices can be operated in parallel to generate an n-bit length. The SN54 / 74LS670 provides a similar function to this device but it features 3-state outputs. 4 x 4 REGISTER FILE OPEN-COLLECTOR LOW POWER SCHOTTKY * * * * * Simultaneous Read/ Write Operation Expandable to 512 Words of n-Bits Typical Access Time of 20 ns Low Leakage Open-Collector Outputs for Expansion Typical Power Dissipation of 125 mW J SUFFIX CERAMIC CASE 620-09 16 1 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 D1 15 WA 14 WB 13 EW 12 ER 11 Q1 10 Q2 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 16 1 N SUFFIX PLASTIC CASE 648-08 16 1 D SUFFIX SOIC CASE 751B-03 1 D2 2 D3 3 D4 4 RB 5 RA 6 Q4 7 Q3 8 GND ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC PIN NAMES LOADING (Note a) HIGH LOW 0.25 U.L. 0.25 U.L. 0.5 U.L. 0.25 U.L. 0.5 U.L. 5 (2.5) U.L. LOGIC SYMBOL 12 14 13 5 4 WA EW WB RA RB ER 11 15 1 2 3 D1 D2 D3 D4 Q1 Q2 Q3 Q4 10 9 7 6 D1 - D4 WA, WB EW RA, RB ER Q1 - Q4 Data Inputs Write Address Inputs Write Enable (Active LOW) Input Read Address Inputs Read Enable (Active LOW) Input Outputs (Note b) 0.5 U.L. 0.5 U.L. 1.0 U.L. 0.5 U.L. 1.0 U.L. Open-Collector NOTES: a. 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) b. Temperature Ranges. The Output HIGH drive must be supplied by an external resistor to VCC. VCC = PIN 16 GND = PIN 8 FAST AND LS TTL DATA 5-1 SN54/74LS170 LOGIC DIAGRAM D4 12 3 D3 2 D2 1 D1 15 EW 13 WB WA 14 G Q D G Q D G Q D G Q D WORD 0 G Q D G Q D G Q D G Q D WORD 1 G Q D G Q D G Q D G Q D WORD 2 G Q RB 4 D G Q D G Q D G Q D WORD 3 11 ER RA 5 6 7 9 10 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS Q4 Q3 Q2 Q1 FAST AND LS TTL DATA 5-2 SN54/74LS170 WRITE FUNCTION TABLE (SEE NOTES A, B, AND C) WRITE INPUTS WB L L H H X WA L H L H X EW L L L L H 0 Q=D Q0 Q0 Q0 Q0 1 Q0 Q=D Q0 Q0 Q0 WORD 2 Q0 Q0 Q=D Q0 Q0 3 Q0 Q0 Q0 Q=D Q0 READ FUNCTION TABLE (SEE NOTES A AND D) READ INPUTS RB L L H H X RA L H L H X ER L L L L H Q1 W0B1 W1B1 W2B1 W3B1 H OUTPUTS Q2 W0B2 W1B2 W2B2 W3B2 H Q3 W0B3 W1B3 W2B3 W3B3 H Q4 W0B4 W1B4 W2B4 W3B4 H NOTES: A. H = HIGH Level. L = LOW Level, X = Irrelevant. NOTES: B. (Q = D) = The four selected internal flip-flop outputs will assume the states applied to the four external data inputs. NOTES: C. Q0 = the level of Q before the indicated input conditions were established. NOTES: D. W0B1 = The first bit of word 0, etc. GUARANTEED OPERATING RANGES Symbol VCC TA VOH IOL Supply Voltage Operating Ambient Temperature Range Output Voltage -- High Output Current -- Low Parameter 54 74 54 74 54, 74 54 74 Min 4.5 4.75 - 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 5.5 4.0 8.0 Unit V C V mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH VIL VIK IOH VOL Parameter Input HIGH Voltage 54 Input LOW Voltage 74 Input Clamp Diode Voltage Output HIGH Current Output LOW Voltage 74 Input HIGH Current Any D, R, W ER, EW Any D, R, W ER, EW IIL ICC Input LOW Current Any D, R, W ER, EW Power Supply Current 0.35 0.5 20 40 0.1 0.2 - 0.4 - 0.8 40 V A 54, 74 54, 74 0.25 - 0.65 0.8 - 1.5 100 0.4 V A V Min 2.0 0.7 V Typ Max Unit V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = - 18 mA VCC = MIN, VOH = MAX IOL = 4.0 mA IOL = 8.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MAX, VIN = 2.4 V IIH mA VCC = MAX, VIN = 7.0 V mA mA VCC = MAX, VIN = 0.4 V VCC = MAX FAST AND LS TTL DATA 5-3 SN54/74LS170 AC CHARACTERISTICS (TA = 25C) Limits Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Parameter Propagation Delay, NegativeGoing ER to Q Outputs Propagation Delay, RA or RB to Q Outputs Propagation Delay, NegativeGoing EW to Q Outputs Propagation Delay, Data Inputs to Q Outputs Min Typ 20 20 25 24 30 26 30 22 Max 30 30 40 40 45 40 45 35 Unit ns ns ns ns Figure 1 Figure 2 Figure 1 Figure 1 Test Conditions VCC = 5.0 V CL = 15 pF RL = 2.0 k AC SETUP REQUIREMENTS (TA = 25C) Limits Symbol tW ts ts th th tLATCH Parameter Pulse Width, ER, EW Setup Time, Data to EW Setup Time, WA, WB to EW Hold Time, Data to EW Hold Time, WA, WB to EW Latch Time Min 25 10 15 15 5.0 25 Typ Max Unit ns ns ns ns ns ns VCC = 5.0 V RL = 2.0 k Test Conditions VOLTAGE WAVEFORMS WRITE-SELECT INPUT WA or WB DATA INPUT D1, D2, D3 or D4 WRITE-ENABLE INPUT EW Vref tsu(W) Vref tw Vref tlatch Vref th(W) Vref th(D) tsu(D) Vref 3V 0V 3V 0V 3V 0V 3V Vref tW Vref tPHL Vref Vref tPLH Vref tPLH 0V 3V 0V VOH VOL DATA INPUT D1, D2, D3 or D4 WRITE-ENABLE INPUT EW 3V Vref 0V 3V Vref tPLH tPHL Vref VOL 3V Vref 0V 3V Vref tPHL tPLH Vref 0V 0V 3V 0V VOH OUTPUT Q1, Q2, Q3 or Q4 Vref READ-SELECT INPUT RA or RB READ-ENABLE INPUT ER OUTPUT Q1, Q2, Q3 or Q4 Vref DATA INPUT D1, D2, D3 or D4 WRITE-ENABLE INPUT EW OUTPUT Q1, Q2, Q3 or Q4 tPHL Vref Figure 1 Figure 2 FAST AND LS TTL DATA 5-4 |
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